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PCB Stackup: Layer Configuration and Materials

Three things must be considered during PCB design that will affect the fabrication of boards: controlled impedance, crosstalk, and interplane capacitance.

Three things must be considered during the PCB design process that will affect the fabrication of the bare boards: controlled impedance, crosstalk, and interplane capacitance. Fabricators can control a stackup’s impedance but cannot consider the other two. They are primarily the engineer’s and the PCB designer’s responsibility since only they know the required requirements and control methods. 911EDA explains how to properly set PCB stackups for the board to function properly.


A properly constructed PCB stackup

The Importance of PCB Layer Configuration

Controlled Impedance

In PCB design, impedance is the result of the combined inductance and capacitor of a circuit at high frequencies. Some PCB components are so fast they can cause harmful reflections, causing issues in other nearby traces. When a signal must have a specific impedance to work correctly, controlled impedance can be used. To prevent reflections, the circuit must send signals at high speeds on paths that have a predetermined impedance. PCBs with controlled impedances on high-speed tracks are required to prevent reflections. Fabricators can control the thickness of substrates to achieve the desired impedance.

The PCB structure determines impedance through the width and thickness (top and bottom) of the copper signal trace, the distance from other copper features, the dielectric constants of the core materials and pre-preg materials, and the thickness of the core or pre-preg on either side of the copper trace.

A graphic illustrating controlled impedance in PCBs



Crosstalk is the unintentional electromagnetism coupling between traces. The coupling between traces can lead to the signal pulses from one trace overpowering the signal from the other, even though the traces are not touching. It can occur when there is tight spacing between parallel traces on a PCB. The minimum distance between parallel traces for manufacturing may need to be increased for electromagnetic purposes.

When two PCB traces run parallel over a distance, a high-speed signal on one trace can interfere with the quality of the parallel trace. Designers can avoid this crosstalk by increasing the distance between the traces if the two traces are on the same surface or inserting a ground/power plane between them if the two traces are adjacent.

A graphic illustrating cross talk in a PCB design


Interplane Capacitance

As signal speeds increase (especially above 100MHz), the lack of capacitance can lead to a failure to meet EMI regulations. This problem cannot be solved by mounting discrete capacitors with high inductance. Designers can create interplace capacitance by placing power and ground planes near each other. The distance between the two is typically less than three mils. Fabricators are able to get the impedance of a stackup correct, but they cannot account for two other factors. This is the responsibility of the PCB designer as they are the ones who know the requirements in the design rules and how to implement them.

PCB materials

PCB materials generally combine three components to meet specific electronic needs: resin, copper, and glass. PCBs use differential pairs to transmit high-speed signals between the transmitter and receiver. The signal can be attenuated by misalignment or skew of the two differential pair traces. Attenuation is the loss of signal strength between connections. It may cause signals to become distorted or indiscernible. Lossy laminate materials and even pre-pregs can cause enough attenuation to destroy the signal before it reaches the destination. The use of laminates with low loss that do not cause signal attenuation can help with this problem. In PCB materials, the dissipation factor (DF) measures the energy loss rate of the electrical oscillation in the system. It must be considered when selecting device fabrication materials that help minimize signal loss.

PCB Stackup and Materials

To mitigate these issues, the design engineer must consider the stackup and materials used. A complete understanding of how a bare board is fabricated and the different materials available is a crucial tool for every PCB designer. This understanding allows them to meet the constraints discussed: controlled impedance, crosstalk, interplane capacitance, skew, and signal loss.

PCB Fabrication

PCB fabrication turns a PCB design into a physical structure (a bare board) based on the specifications provided in the PCB design package. Understanding the production process of a printed circuit board is vital for making the right decisions when designing a stackup. Foil lamination is one of manufacturers’ most popular and cost-effective methods to fabricate multilayer PCBs.

Three essential components are included in a six-layer PCB.

  • Copper foil
  • Pre-preg
  • Laminates

The outer layers of the PCB will always be solid copper sheets after laminating and drilling. Copper foil is used for tracing the pathways, allowing the flow of charges and signals within the device. Copper is used to guide the manufacturer’s current to plate copper into the holes drilled for component leads and vias. No copper foils can cross each other.

Pre-preg is woven fiberglass cloth coated with a system of resin and is the dielectric material between the adjacent cores or the core and a layer. The best pre-preg material for a given multilayer PCB depends on the thickness, layer structure, and impedance. The three types of pre-preg available based on the content of resin present are high resin, medium resin, and standard resin. The resin used depends on the design. The resin is not fully cured, but the fabricator uses it as the adhesive when he laminates the stackup. 

The laminate is made of the same resin/glass as the pre-preg. A layer of copper foil is also bonded on both sides to the laminate. The copper foil is also cured by the press bonding the laminate. The fabricator will etch two layers of the laminate at once, including the inner signal path and plane layers.

Fabricators always form layers in pairs. Fabricators design stackups with multiples of even numbers of layers. Multiple lamination cycles, as well as blind vias and buried vias, can be used to build up the stackup. The cost of a board is determined by the manufacturing process used by the fabricator.

Process Flow

When manufacturing a PCB with multiple layers, achieving tight impedance control is one of the most important considerations. Fabricators can achieve this control by etching and plating traces of the correct width on the outer layers. They also etch the traces in the inner layers and maintain a specific thickness during lamination.

Etching is a method of removing unwanted copper from between the traces. Etching can affect the impedance depending on the width and spacing. Fabricators typically place an etch resistance on all remaining copper circuits. The etching solution can then remove the copper. This solution also etches the copper in a sideways direction, making the trace larger at the bottom of the trace than at the top. As the thickness of the copper increases, the error also grows. A thinner copper layer will allow for better control of the impedance. Fabricators prefer to use 1/2-ounce copper layers as inner signal layers.

The unwanted copper is etched away to form the signal traces. The copper is then removed to create the signal traces. With the copper layer in the outer layers being thicker than the inner layers, it is crucial to adhere to tolerances. Controlled impedance is only used for signals on inner layers.

The resin in the pre-preg melts during lamination and fills the gaps between adjacent copper layers. The pressure while laminating the materials together squeezes the excess pre-preg from the board edges, thinning the layers..

The distance between the trace and the nearest plane is critical for controlling impedance accuracy. Designers match the signal layers to the plane layers in a laminate. Lamination is used between two layers to ensure separation accuracy.

Dielectric Constant

The dielectric constant, or Dk, is crucial for a laminate system. The dielectric constant refers to how well a PCB material can store electrical energy. It measures how much the material can “hold on” to an electrical charge. This attribute is crucial in deciding the performance of electronic devices. It affects the speed and quality of electrical signals passing through the PCB. The dielectric constant has a direct impact on the parasitic capacitance. The transmission line impedance of a trace of a copper trace, copper plane, and laminate depends on the parasitic capacitor formed between the plane and trace.

The dielectric constant affects impedance inversely. The parasitic capacitance will increase with a greater dielectric constant. It is, therefore, essential to have a good understanding of the different types of laminates available to create PCBs of controlled impedance.

Laminate Types

There are many types of laminates available. Fabricators choose laminate systems that are readily available in their region. FR-4 is the most common laminate. FR-4 refers to glass-reinforced epoxy resin laminates. It is a flame-retardant material. Hence the name FR-4 (FR = Flame Retardant). It is preferred due to its high mechanical and electrical strength.

Additionally, it features high thermal dissipation when manufacturers apply additives. Furthermore, these additives can increase the material’s stability, reliability, and power specifications. The datasheets for laminates provided by the industry are usually only compliant with IPC standards. The datasheet contains electrical information about the typical dielectric constant and loss tangent measured at 1MHz. Both quantities, however, vary depending on the frequency and glass-to-resin ratio. Fabricators must calculate impedance using the dielectric constant at frequencies around 2 GHz. These laminate manufacturers provide this information.

Arranging the Layers

PCB designers must decide the number of signal and power layers and arrange them properly to comply with signal integrity and power delivery requirements. The PCB designer must keep the power and ground planes close to ensure proper interplane capacitance. It may be necessary to compromise between the routing signals on the layers and the interplane capacitor for a multilayer board.

A stackup with only one plane pair closely spaced is suitable for routing but not for power delivery if the interplane capacitance is needed. Two sets of plane pairs can provide interplane capacitance, but they reduce routing space. Using a fully copper layer in PCBs with two signal layers and a controlled impedance is impossible because the copper layer can change the impedance between adjacent layers.

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