September 28, 2017

The Electronic System Design (ESD) Alliance Market Statistics Service (MSS) today announced that the Electronic Design Automation (EDA) industry revenue increased 9.8% for Q2 2017 to $2209.2 million, compared to $2012.6 million in Q2 2016. The four-quarters moving average, which compares the most recent four quarters to the prior four quarters, increased by 11.3%.

"The EDA industry continued to grow in Q2, reporting increases in all product categories and geographic regions," said Walden C. Rhines, board sponsor for the ESD Alliance MSS and president and CEO of Mentor, a Siemens business. "The Printed Circuit Board & Multi-Chip Module and Semiconductor IP categories reported double-digit growth in Q2, as did the Asia/Pacific region. This is the strongest Q2 in five years."...

September 20, 2017

Cadence Design Systems, Inc. today announced Cadence Allegro DesignTrue DFM technology, the industry’s first solution to perform real-time, in-design design-for-manufacturing (DFM) checks integrated with electrical, physical and spacing design rule checks (DRCs). The innovative new technology, integrated into the Allegro PCB Editor, enables PCB designers to identify and correct errors immediately, long before manufacturing signoff. By finding errors earlier, design teams reduce rework, shorten design cycles and accelerate the new product development and introduction process, potentially saving at least one day per iteration and days to weeks overall.

Unlike manufacturing signoff tools that are run in batch mode when performing DFM checks, Allegro DesignTrue DFM technology...

September 14, 2017

Cadence Design Systems, Inc. today announced Cadence Allegro DesignTrue DFM technology, the industry’s first solution to perform real-time, in-design design-for-manufacturing (DFM) checks integrated with electrical, physical and spacing design rule checks (DRCs). The innovative new technology, integrated into the Allegro PCB Editor, enables PCB designers to identify and correct errors immediately, long before manufacturing signoff. By finding errors earlier, design teams reduce rework, shorten design cycles and accelerate the new product development and introduction process, potentially saving at least one day per iteration and days to weeks overall.

Unlike manufacturing signoff tools that are run in batch mode when performing DFM checks, Allegro DesignTrue DFM technology...

August 29, 2017

There's still time to register for PCB West 2017. This annual PCB design conference will be held September 12 - 14, 2017, in Santa Clara, CA. The event includes a three-day technical conference and one-day exhibition to be held at the Santa Clara (CA) Convention Center.

The September event features more than 75 presentations, the most-ever for the 26-years-old event. Among the featured speakers are Rick Hartley, Doug Brooks and Susy Webb, with topics ranging from signal noise control, RF design, thermal considerations, flex circuits, and assembly troubleshooting.

The annual Free Wednesday program offers more than 20 free presentations covering all types of design, fabrication and assembly issues. Free Wednesday takes place September 13, the same day of the exhibition...

August 10, 2017

Mentor, a Siemens business, today announced that Artificial Machines, a leading smart machine design company that empowers its customers with cutting-edge SMART machine intellectual property, has standardized on Mentor electronic design automation (EDA) design solutions. The competitive replacement includes leading-edge Mentor solutions such as Xpedition printed circuit board (PCB) design, Hyperlynx simulation, Valor manufacturing validation and ASIC chip design tools. The Mentor portfolio provides Artificial Machines with an end-to-end electronic product design pipeline for its HAZE platform, and represents a significant infrastructure advance for the Artificial Machines design team.

Artificial Machines (AM) is a technology company working with some of the world’s largest...

August 8, 2017

Zuken and XJTAG have entered into a partnership to enhance Zuken’s CR-8000 with a design for test (DFT) capability that will improve test coverage during schematic entry. The capability is based on XJTAG’s DFT Assistant, and will be available later this year as a free plugin for Zuken’s CR-8000 Design Gateway users.

CR-8000 is a native 3D product-centric design platform for PCB-based systems. CR-8000 directly supports architecture design, concurrent multi-board PCB design, chip/package/board co-design and full 3D MCAD co-design. CR-8000 Design Gateway is Zuken’s platform for logical circuit design and verification.

Validate JTAG chain connectivity

Increasingly, printed circuit boards (PCBs) are densely populated making it difficult to gain...

July 24, 2017

Mentor, a Siemens business, has released the latest version of its FloTHERM product, the industry’s most powerful and accurate computational fluid dynamics (CFD) software for electronics cooling simulation. The latest product offers new functionality aimed at increasing user effectiveness and productivity. The FloTHERM product includes Command Center, which allows users to understand the product design space by defining variations of the base models. The Command Center design window streamlines the interface and user work to achieve productivity gains. Addressing the needs of industries which demand product reliability including automotive, aerospace, and electronics, the FloTHERM product quickly identifies potential thermal problems early in the design stage to significantly lower the...

July 3, 2017

Zuken now offers enhanced support for communication between multidisciplinary design teams through the new CADSTAR Redlining markup tool.

The latest version of its CADSTAR desktop PCB design software also supports industry requirements for high-speed design, and includes across-the-board performance enhancements and ease-of-use features. One highlight is developments in the industry-leading Activ-45 router – making the routing experience even more intuitive and powerful, and giving users more control over their designs.

 Redlining for speedy and accurate communication

The new CADSTAR Redlining tool improves...

June 27, 2017

In this June 29, 2017 webinar, attendees will get an overview of the functionality in the PADS Router environment and demonstrate how easy it is to route to the rules created for your design, including your high-speed constraints.

Attendees will learn:

-  Interactive routing and other PCB layout functions in the PADS Router

-  Defining high-speed contraints

-  Autorouting in the PADS Router with high-speed rules

-  Setting up routing Strategies for the PADS Router

Webinar presenter Ernie Frohring is a senior applications engineer with Trilogic Inc. He specializes in high-speed design, teaching classes, doing presentations, and working one-on-one with customers using the EDA tools from Mentor Graphics

Date and...

June 15, 2017

Mentor, a Siemens business, today announced that it has launched the Mentor OSAT (Outsourced Assembly and Test) Alliance program to help drive ecosystem capabilities in support of new high-density advanced packaging (HDAP) technologies like 2.5D IC, 3D IC and fan-out wafer-level packaging (FOWLP) for customer integrated circuit (IC) designs. By launching this program, Mentor will work with OSATs to provide fabless companies with design kits, certified tools, and best practices to aid in smoother adoption of these new packaging solutions that require a much tighter link between chip and package design. Mentor also announced Amkor Technology, Inc. as its first OSAT Alliance member.   

Through the Mentor OSAT Alliance, members work with Mentor to create certified design kits to...

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