911EDA Blog | PCB Layout and PCB Design Services

DownStream Technologies has released DFMStream, a comprehensive yet easy-to-use tool suite designed to help engineers and designers verify design and manufacturing rules on PCB design databases, Gerber and NC data any time during the PCB design cycle.

Preparing PCB design data to be released to manufacturing is a critical and often fragile step in the new product introduction (NPI) process. Designs that work in a virtual PCB CAD system may unknowingly break critical manufacturing rules resulting in delayed delivery times as deviations and work-arounds are performed at the manufacturer. In the case of a manufacturer who “fixes” a design, the resolution could actually change the original design intent and then, if the “fix” is not fed back into the source EDA CAD data, will result in repeated violations when the board is to be built again.

Current DFM tools address some of the needs of engineering organizations but in most cases are expensive, difficult to learn and cumbersome to use by the infrequent user as part of the everyday design flow. With the release of DFMStream, DownStream Technologies bridges the gap between engineering and fabrication and addresses a critical need with a sophisticated and intuitive solution to cut costs and reduce product release bottlenecks.

“With DFMStream, we not only address the need for easy-to-use DFM tools but also introduce necessary functionality to help in the process of releasing PCB designs to manufacturing,” said Rick Almeida, one of the founders of DownStream. “The combination of deep DFM verification combined with an intuitive user interface makes it easy for even an infrequent user to have access to powerful DFM capabilities and is in stark contrast to competitive products that, because of their complex user interface, often require dedicated staff to operate.”

Included in DFMStream is the DesignAnalyzer–which analyzes the contents and complexity of a PCB design against the capabilities of the PCB fabricator. This functionality will help reduce the overall cost of PCB fabrication by helping the user choose the correct manufacturer and reducing hidden costs and unexpected delays. The Design Analyzer also generates a report containing all information required by a board vendor to estimate the cost and delivery of the fabricated PCB. In many cases the Design Analyzer can allow the fabricator to suggest minor changes to design features that could reduce fabrication cost without impeding design performance.

“The Design Analyzer tool is vital in PCB post-processing as it helps the board designer compare the design against the capabilities of the PCB fabricator, minimizing any risk and allowing for the most economical fabrication process,” said Almeida. “By analyzing the design users can optimize it for the best possible fabrication run while still in engineering and save time by helping to identify the appropriate fabricator for the job while maintaining quality and design integrity.”

DFMStream provides a number of tools to help verify design data for bare board fabrication, assembly, silkscreen, and solder and paste mask compliance for optimal manufacturability. In addition, manufacturing rule files can also be set up and re-used for specific vendor capabilities, greatly reducing set up time for DFM verification. DFMStream also supports a number of functions to allow users to sort through DFM errors to quickly isolate the root of the problem for fast defect resolution. Errors can be fixed right in DFMStream or cross probed back to the source E-CAD system to fix the error in the PCB database, eliminating repeat defects in follow on iterations and production runs.

Other DFMStream highlights include:

• “Streams” Driven Analysis–DFMStream uses a “Stream” file to queue a series of DFM analysis checks for a design. Users can define the order or “Stream” of checks combining netlist or layer comparison, design rule verification, fabrication and assembly verification on the entire design with a single click of a button. This dramatically reduces set up and execution of the analysis. DFMStream offers the ability to save and recall different Streams based on technology, vendor capabilities, or unique design requirements.
• Hierarchical Analysis–In many cases different parts of a PCB require different rules and different analysis. DFMStream’s unique rule hierarchy allows you to tailor the verification and rule sets according to bare board construction, board density, and component technology. DFMStream will locate errors that violate a set parameter such as incorrect spacing and potential errors such as silk screen ink over plated through holes that will arise during fabrication or assembly.
• Design Rule Compliance–Gerber, drill, and ODB++ data can be analyzed to ensure the data was correctly generated from the CAD design. Design rule verification compares the PCB features against PCB vendor design requirements to ascertain how well a board meets the manufacturer’s requirements even before submitting the PCB for fabrication.
• Bare Board Analysis for Fabrication–DFMStream’s analysis will detect specific topology issues that have an adverse effect on PCB fabrication such as outer vs. inner layers and plane layers, plating versus non plating drill hole checking and copper to board edge clearances.
• Mask and Screen Analysis for Assembly–DFMStream’s analysis will detect PCB topologies that could have an adverse effect on PCB assembly such as potential solder mask bridging where solder mask openings expose adjacent PCB features. DFMStream’s analysis will analyze silkscreen ink for potential pad contamination eliminating PCB scrap or rework and delays in product shipment and will detect missing, extra, and improperly sized paste masks reducing the incidence of cold solder joints or component tombstoning
• Design Delta Analysis–Use DFMStream’s Design Delta analysis to compare PCB design data from independent sources to identify differences. For example, compare a Netlist extracted from Gerber and NC data against a standard IPC-D-356 netlist generated from the PCB CAD design to ensure Gerber, NC, and ODB++ data were extracted correctly and without loss of design intent. DFMStream’s Design Delta analysis will perform comparisons such as: layer to layer; Gerber to design graphics; Gerber to drill; design revision to design revision and many other combinations.
• PCB Assembly Analysis–DFMStream’s analysis will detect improper part spacing, allowing the user to set up numerous spacing requirements between different part types that reflect the assembly line insertion flow.
• Error Charting–Large scale analysis can often result in a large number of reported failures. Viewing the results of large scale analysis in chart form allows you to get to the root of the failure and quickly ascertain a remedy.  Charting allows you to review the specifics of the failures to identify trends or unexpected results. DFMStream’s charting feature reports the exact value of the error and the PCB features involved in that error. The charting function groups common errors so they can be quickly identified and resolved in DFMStream or the host CAD system.
• Design Analyzer–DFMStream’s Design Analyzer bridges the gap between engineer and PCB fabricator by extracting key information about the PCB and presenting it in an easy to read report. This report is compared against the vendor’s fabrication capabilities to ensure the vendor can fabricate the PCB. The vendor can review the contents of the report and in many cases make suggested changes to the design that may result in significant savings of cost and valuable time to market.
• PCB CAD Cross Probing–DFMStream’s cross probing allows engineers to quickly visualize DFM analysis results with the source PCB CAD file. DFMStream supports hot-linking between both intelligent design data, such as ODB++, or Gerber information. Errors selected within DFMStream or the report window are immediately identified in the host CAD system. This allows you to correct the error in the source CAD design so later design iterations do not replicate known and resolved problems. DFMStream cross probes to the leading EDA CAD tools such as PADS, Expedition, OrCAD and Allegro.
• Gerber and NC Editing and Optimization–DFMStream’s editing environment allows you to make changes in Gerber or NC data when time constraints are critical. DFMStream offers a wide array of tools to add or modify Gerber flashes and draws, create custom apertures, modify apertures or drill parameters and so on. DFMStream provides flexibility to meet the design to manufacturing flow that correlates to the design situation.
• Fast Assembly Panel Creation–While focused primary on analysis, DFMStream also offers multi-image PCB panel design to quickly step and repeat an array of PCBs to drive pick and place assembly.

Zuken has announced its support for the IPC-2581 electronic data transfer format. IPC-2581 is a generic standard for printed circuit board manufacturing description data and transfer methodology. Zuken is a founding member of a new cross-industry consortium that has been established to support the standard. The first EDA vendor consortium member to support IPC-2581, Zuken has introduced the format into its CR-5000 product line in response to requests from customers and with the view that an independent format is best suited to meet customer requirements.

“We’re happy to see Zuken support the IPC-2581 format and we’re pleased to see the formation of a consortium of vendors and OEMs to promote and encourage adoption of the format,” says Mike Green of Lockheed Martin. “We have long believed that independently controlled and maintained standards are the most effective solution for industry-wide needs such as this.”

Independent Consortium

The need for an independent format that covers the wide range of needs has been recognized for many years. This led to the recent formation of a consortium for supply chain adoption of IPC-2581. The consortium’s goal is “to accelerate the adoption of IPC-2581 as an open, neutrally maintained global standard to encourage innovation, improve efficiency and reduce costs.”

Zuken’s Commitment

Zuken supports efforts by independent standards bodies such as IPC to create and maintain neutral standards that all may adopt and benefit from. “Open standards, such as IPC-2581, have always afforded the greatest benefit to the widest audience,” says Steve Chidester, Zuken’s Head of Product Marketing. “To support the requirements of our customers and the industry, Zuken will be an active member of the consortium and is committed to supporting this standard as a viable solution for our customers and the industry.”

To find out more about Zuken’s software solutions, contact your Zuken representative or visit www.zuken.com/.

About IPC-2581 Consortium

IPC-2581 Consortium is a group of PCB design and supply chain companies whose collective goal is to enable, facilitate and drive the use of IPC-2581 in the industry. It is devoted to accelerating the adoption of IPC-2581 as an open, neutrally maintained global standard to encourage innovation, improve efficiency and reduce costs. Members of the IPC-2581 Consortium include OEMs, EDA/DFM/CAM software companies, PCB fabricators, electronics assemblers and test companies. The Consortium is open to any PCB design and supply chain company that is prepared to support or is committed to a roadmap for IPC-2581 adoption.

Altium Designer has now been made available to over 5,000 GoEngineer customers.

GoEngineer, Inc., is a unique business partner and has been helping engineering, manufacturing, and product design companies innovate and stay competitive for the past 26 years. GoEngineer provides best-in-class solutions from SolidWorks, Stratasys, CAMWorks, and Oracle Agile PLM with training, services, and technical support resources throughout the Western and South Central United States.

Altium has engaged in a partnership with GoEngineer, a leading reseller of product design software, to deliver Altium’s next-generation electronics design software and services to GoEngineer’s network of over 5,000 U.S. customers. Altium’s electronic design automation (EDA) products complement GoEngineer’s existing line of design tools from SolidWorks, CAMWorks, Stratasys and others, and allows Altium to broaden its reach in the U.S. market.

“GoEngineer is pleased to add Altium to its core solution suite that focuses on solving tough technology problems and to help companies design better products,” said Ken Coburn, president and founder of GoEngineer. “We are impressed by Altium’s strategy in pioneering a next-generation electronics design platform that encompasses the full suite of tools needed to take a product from design to manufacture.”

GoEngineer will make available the full suite of Altium products, including Altium Designer software with smart design data management, FPGA/PCB co-design, real-time 3D PCB design, integrated version control, managed release processes, and more. Altium Designer is linked to AltiumLive, a new web-based ecosystem that acts as a conduit for delivering content and services directly to customers on the Altium subscription plan, and provides a platform that designers using Altium’s products can harness to more rapidly create cloud-connected electronic devices. Also available will be Satellite Vault technology for secure lifecycle management of electronic design data, provided as part of an Altium subscription.

“GoEngineer has demonstrated repeated success with their approach in providing customers with holistic service, from implementation to training to support for the design and manufacture of products,” said Bob Potock, director of marketing for Altium Americas. “As Altium continues to grow its global footprint, with over 2,800 new companies signing on in the past fiscal year, we’re pleased to partner with a market-leading organization like GoEngineer with over 26 years’ industry experience. The combination of the two organizations will provide a unique product and services offering for the product development community.”

911EDA, Inc. is a premier Altium Designer service provider offering both Altium Designer PCB layout services, FPGA design, and Altium Designer Training Courses.

Mark Laing is a product marketing manager in the Valor Division of Mentor Graphics Corporation.  Mark recently published the following column discussing design for manufacturability.  911EDA considers DFM in every design and can provide DFM analysis reports on how to reduce manufacturing costs, increase yield, and avoid potentially costly delays in the manufacturing process.

Mark’s column:

Complete fabrication analysis needs to be performed in conjunction with the PCB layout tool as part of a “left-shift” strategy (moving analysis further “left” on the timeline) that positions the analysis in conjunction with the layout process. That way, issues can be highlighted as soon as they are found, when they are easiest to correct as opposed to when the board is complete and the chance for change is limited and cost is excessive.

Design For Assembly

For most PCB assemblers, the biggest single defect category is solder-related. Ensuring the optimum relationship between the component pin, copper, mask and paste lessens the chances of these defects. OEMs now utilize available EDA tools that automatically check design rules and tolerances to ensure that a design can be effectively manufactured. Coupled with the DFM software should be a parts library which contains a robust selection of manufacturer-specific package parameters with detailed body outline contours and pin terminus areas that can be used to check the relationship between component and PCB. This is another key component of the DFM analysis, as it will highlight components that will not fit the board layout when an approved vendor list (AVL) is used.

For contract electronic manufacturers (CEM) who purchase components separately, performing this pin-to-board analysis can be crucial to optimizing manufacturing yields. Here, process preparation capabilities can automate pin-to-board analysis as part of the process to create complete manufacturing data for assembly, test, inspection and documentation purposes.

These same AVL packages can be used to determine if any proximity issues will arise from two components being too close to each other. With today’s lead-free solder, components typically stay where they were originally placed and so have fewer tendencies to self-center than with lead-based solder. The CAD outlines are a poor means of determining potential conflicts, and so this separate package analysis is crucial to reduce placement and rework issues.

Design For Test

The PCB manufacturing process is not perfect. If it were, there would be no need to test or inspect a board for headaches that arise from the assembly process or the components used to build the product. But due to continuing process improvements, some products require little, if any, test or inspection. Cell phones are now produced in such quantities and with such minimal changes to the production line that all testing can be covered using the built-in self-test (BIST) that has been incorporated into the product as part of its design.

However, most products do require a level of electrical test or non-contact inspection as a means of detecting component or process defects that have occurred. In the case of electrical test, features are placed on the board to provide a means of creating contact points between it and the piece of test equipment. This may be an in-circuit test (ICT) machine, a boundary scan test (BST) machine or a flying probe test (FPT) machine – or a human with a benchtop oscilloscope. It is advantageous to use dedicated features on the board for this purpose instead of existing pins on the board; the act of touching the board with a probe can cause a defect to occur or mask a defect from detection.

It is important to incorporate DFT analysis as early as possible in to the design process. The test engineering department can specify which nets on the board need test access. DFT software can then analyze the board and confirm whether the required access is available.

Summary

DFM analysis plays a major part in yield optimization of a PCB through the assembly processes, and to be effective it should be applied as early as possible in the design process as possible.

If you still believe DFM analysis isn’t essential, consider this: The Aberdeen Group found that integrating the described DFM process between design and assembly can reduce the number of design spins by 57% and achieve average material cost savings of $20,800 per design¹.

References

¹ Michelle Boucher, Why Printed Circuit Board Design Matters to the Executive: How PCBs are a Strategic Asset for Cost Reduction and Faster Time-to-Market, Aberdeen Group, Boston, MA, February 2010.

Mark Laing is a product marketing manager in the Valor Division of Mentor Graphics Corporation.

There is still time to submit your design to the most prestigious design contest in the PCB industry, the Mentor Graphics Technology Leadership Awards (TLA). But you need to act soon. The contest closes September 30, 2011.

This program, the longest-running competition of its kind in the EDA industry, recognizes engineers and CAD designers who use Mentor Graphics’ innovative technology to address today’s complex PCB systems design challenges and produce industry-leading products.

911EDA has submitted two designs this year!

Important dates:

Accepting submissions: OPEN NOW.
Deadline for submissions: September 30, 2011.
Winners’ announced: November 17, 2011.

For more information or to submit your design, click here.

Created by David Huckabay at SMTInspection.com
Microscopes

EDA and IP supplier Cadence Design Systems Inc. Monday (April 11) announced a comprehensive DDR4 intellectual property (IP) solution said to enable SoC designers to immediately take advantage of the performance gains offered by DDR4, the fourth-generation double-data-rate synchronous DRAM standard.

Cadence (San Jose, Calif.), which last year acquired IP vendor Denali Software Inc. for $315 million, said it has worked with hundreds of customer to integrate previous versions of the DDR memory controller interface. The Cadence DDR4 solution includes hard and soft PHY IP, controller IP, memory models, verification IP, tools and methodologies and signal integrity reference designs for the package and board.

According to Neil Hand, group director of marketing for Cadence’s SoC Realization group, SoC designers are increasingly embracing third-party IP for memory storage. Hand said he views the transition as stage three of the IP market evolution. In the 1990s, designers began to embrace third-party processor IP, then began embracing interface IP in the 2000s. The embrace of memory and storage IP, which began in earnest last year, is the third wave, he said.

“Memory and storage is the new frontier for IP,” Hand said. “It is becoming a more complicated area for customers and it really touches every area of the design.”

According to Hand, it wasn’t long ago that designers thought the only form of IP worth using was the processor. “Now it’s just a given that if you start your own design you’re not going to build your own PCI Express interface,” Hand said. “Soon it will be that way with memory and storage as well.”

Given the impact that memory controller IP has on the overall performance of the SoC and system, Cadence said it is expanding the in-house development of comprehensive memory and storage controller IP to ensure maximum robustness and performance. The company said it plans to continue Denali’s tradition of developing IP in parallel with industry standards, to give customers a leg up in time to market.

If you get your memory and storage architecture right, you’re design can meet its needs,” Hand said. “If you get it wrong, it will impact the entire design. If you get it wrong, the SoC is dead.”

The DDR4 specification, an SDRAM memory technology standard currently under review at Jedec, proposes speeds ranging from 1,600 mega transfers per second (MT/s) up to 3,200 MT/s, more than 50 percent faster than the current DDR3 standard. As the standard evolves to support higher frequencies and throughput, signal integrity, power and performance issues multiply, according to Cadence. The specification is expected to be finalized this year.

Cadence said its IP integration environment enables customers to model and analyze their target memory topology, and verify the behavior of the IP at both the SoC and system levels. The soft PHY and controller provide tremendous flexibility and can be synthesized to support the full range of frequencies and voltages, Cadence said. Designers can deliver either a pure DDR4 SoC, or combine DDR4 with other technologies like DDR3 or LPDDR2, Cadence said.

For interface IP, Cadence said it would offer high-performance interface solutions, such as PCI Express Gen2 and Gen3, as well as Gibabit Ethernet (GbE), 10 GbE and 40 GbE solutions. The combined Denali and Cadence services team offers decades of design expertise, the company said.

For compute IP, Cadence said it would continue to collaborate with leading IP providers such as ARM Holdings plc to ensure that the company can support the compute needs of SoC designers. The group’s primary focus will be on ensuring successful integration through advanced methodologies, tools and reference flows that take a holistic approach to SoC design and verification, Cadence said.

Cadence said its DDR4 controller IP, verification IP and memory models are available now, supported by both Cadence and third-party design tools and methodologies. A soft DDR4 PHY is expected to be available this quarter, while a hard PHY solution for 28-nm TSMC geometries is expected to be available by the third quarter, Cadence said.

Mentor Graphics Corporation today announced that it has received the Circuits Assembly Magazine New Product Introduction (NPI) Award for the Valor® vManageTM Materials Manager product in the Software-Management category. The Materials Manager software product is a collection of applications based on the vManage database that streamlines material flow in the form of kits linked to work orders from ERP. This helps ensure that the right material arrives at the right location on the shop floor at the right time. The benefits of the Materials Manager product include accurately matching the continuous flow of material entering the shop floor to real-time rates of production and spoilage; achieving minimum inventory levels to prevent line stops; and keeping the factory responsive to changing requirements.

When ERP and Warehouse Management tools have limited visibility to shop floor material movements or actual production rates, a lean solution can be impossible to achieve. Often, excess material is committed to operations to create a buffer to keep things moving, resulting in added costs, tying up capital and masking the real problems. The vManage Materials Manager software bases all material movements on accurate real-time data from the shop floor, whether delivering materials directly to a machine, or managing set-up on an off-line trolley.

Premiering in 2008, the New Product Introduction Awards sponsored by Circuits Assembly Magazine is an annual celebration of product excellence in electronics surface mount assembly. Premier products based on the finest examples of creative advancement in technology are chosen by a distinguished panel of industry experts.

“We are honored to accept the NPI award for our vManage Materials Manager software which provides a solution for lean and efficient manufacturing today, delivering real value and a rapid return on investment for electronics designers and manufacturers,” stated Dan Weitzman, Americas regional business manager, Valor Division of Mentor Graphics. “This is the second year in a row that Valor has been recognized for its innovative software technologies, winning the 2010 NPI Award for the Valor MSS software suite.”

The Materials Manager product was founded on the principles of “Lean Thinking,” eliminating waste of all descriptions, including materials and energy, resulting in reduced environment and financial costs. The software is commercially flexible, allowing customers to add or select functions to meet immediate needs, and also features the technical flexibility to connect to other systems and databases through API SDK.

911EDA supports all Mentor products including PADs, Logic, Expedition, and BoardStation.

Mouser Electronics, Inc., a top design engineering resource and global distributor for semiconductors and electronic components, has announced a new partnership with Altium which sees live links connecting Altium Designer and Mouser’s extensive part information, placing it right onto the engineer’s desktop. 911EDA supports Altium Designer PCB layout services and uses AltiumLive.

The new links are now part of AltiumLive, Altium’s new ecosystem for the seriously professional electronics designer, announced earlier in March 2011 alongside its new release of Altium Designer. AltiumLive and the Altium Designer combine to help design engineers better manage data and deliver new content to speed product development. Using AltiumLive, designers are freed to create and innovate – untangling the design data knot and streamlining the design process at every stage of product development.

“As a company, we’re driven by supplying the newest products and emerging technologies for the design chain,” states Kevin Hess, Mouser Vice President of Technical Marketing. “Having current part information and immediate component access is a huge design advantage. Combine that with our company’s sharp focus on the newest components, and it means engineers are able to more quickly produce new designs that provide a clear edge in product lifecycles, features and speed to market.”

“It’s essential for Altium to add as many relationships with the key parts suppliers serving the design industry as possible, so that the AltiumLive ecosystem becomes the “go to” portal for the seriously professional designer,” says Alan Smith, Associate Director Corporate Communications, Altium. “Mouser is a trusted and proven international distributor known for being serious about support and service. All of our customers now have a direct download capability that’s available to Mouser for component information and pricing – we can take them further into the supply chain. This is a major step for us and our growing customer base in building a design ecosystem of the future right now.”

With its broad product line and unsurpassed customer service, Mouser offers customers the latest, most technologically advanced components for their newest design projects. Mouser Electronics’ website is updated daily and searches more than 7 million products to locate over 1.8 million orderable part numbers available for easy online purchase. Mouser.com also houses an industry-first interactive catalog, data sheets, supplier-specific reference designs, application notes, technical design information, and engineering tools.

About Altium Altium Limited (ASX:ALU) creates electronics design software based on the belief that anyone who wants to create electronic products that make a difference should be able to do so. Altium’s unified electronics design environment links all aspects of electronics product design in a single application that is priced to be as affordable as possible. This helps electronics designers break down barriers to innovation, harness the latest devices and technologies, manage their projects across broad design ‘ecosystems’, and create connected, intelligent designs. Founded in 1985, Altium has headquarters in Sydney, and operates worldwide.