911EDA Blog | PCB Layout and PCB Design Services

Association Connecting Electronics Industries® will launch IPC Outlook, an electronic newsletter and Web portal for multimedia information about technology, standards, best practices and industry research. The new e-publication will focus on information that helps engineers and managers succeed in their jobs.  911EDA designs to IPC specifications and will update our practice based on this update.

Based on feedback from a major communications study conducted by IPC in 2011, the distribution of IPC Outlook will be weekly and open to all individuals working in the electronics manufacturing industry. Regular features will include sections on cleaning; new product innovations; expert Q & A; defect analysis; materials; production floor; supply chain and IPC updates.

“This is a major step for IPC,” says IPC Vice President of Marketing and Communications, Kim Sterling. “Broadening our communications within the industry will reinforce IPC’s already-strong position as ‘the most trusted’ outlet for supporting the needs of industry companies, with critical and reliable information.”

IPC Outlook is available in preview version at www.IPCOutlook.org. The Web portal and newsletter will be advertiser-supported with sponsorships available at various levels, including discounts for IPC members.

“IPC Review, our member newsletter, will transition into IPC Outlook and provide information that’s more timely and dynamic,” continues Sterling. “This is an exciting opportunity for more people in the industry to benefit from IPC’s commitment to education and information exchange.” Sterling confirms that IPC members will enjoy privileged access to more information and resources in the members-only section of the IPC website.

A subscription to IPC Outlook is free. Visit www.IPCOutlook.org to subscribe.

About IPC

IPC is a global trade association based in Bannockburn, Illinois, dedicated to the competitive excellence and financial success of its 3,000 member companies which represent all facets of the electronics industry, including design, printed board manufacturing, electronics assembly and test. As a member-driven organization and leading source for industry standards, training, market research and public policy advocacy, IPC supports programs to meet the needs of an estimated $2.02 trillion global electronics industry. IPC maintains additional offices in Taos, New Mexico; Arlington, Virginia; Stockholm, Sweden; Moscow, Russia; Bangalore, India; and Shanghai, Shenzhen and Beijing, China. For more information, visit www.ipc.org.

Mentor Graphics Corporation today announced financial results for the company’s fiscal third quarter ended October 31, 2011. The company reported revenues of $250.5 million, non-GAAP earnings per share of $.25, and GAAP earnings per share of $.22.  911EDA supports PCB layout and PCB designs using Mentor Graphics products, including Expedition, BoardStation, and PADs.

“Bookings were again a record, up over 20% from the previous third quarter record, and for the second consecutive year our book-to-bill through the third quarter is positive,” said Walden C. Rhines, Chairman and CEO of Mentor Graphics. “This quarter saw the beginning of the strength we predicted in our Design to Silicon category for the second half, with bookings in the third quarter up year-on-year by over 55%, and by about 15% year to date. Looking forward, we expect the technical challenges of advanced nodes to drive significant opportunity for us.”

During the quarter, the company expanded the Valor® product line with a new business intelligence product. The Mentor® Nucleus® real-time operating system was upgraded to include new power management technology, making it an even more compelling solution for mobile computing and telecommunication. The company also advanced its embedded systems software suite for automobile infotainment with a GENIVI compliant product and a partnership with Freescale Semiconductor. ARM and Mentor announced a joint manufacturing test solution for ARM processor-based designs. NuFlare Technology and Mentor announced a partnership on advanced IC mask generation. The company announced improvements to its design-for-test products that will allow it to find new classes of chip defects. GlobalFoundries and Mentor announced new support for GlobalFoundries’ third generation design sign-off for leading-edge IC manufacturing. The Mentor transportation Capital® product suite won an EDN Hot 100 products of 2011 award.

“Leading indicators for the business continued to be strong, with third quarter support declines down and consulting and training bookings doubling. Annual fees for renewing contracts in the top ten transactions were up 40% over their prior annual fees. Base business, contracts below $1 million in value that booked and billed in the quarter, grew 15% over last year,” said Gregory K. Hinckley, President of Mentor Graphics. “The company’s earnings have historically been very back-end loaded with much of our business closing in the fourth quarter. For the last several years, we have been working with our customers to create more linearity in our financial results, and are pleased with the progress we have been showing. With our newly raised guidance, we now expect 48% of annual non-GAAP earnings to occur in the fourth quarter this fiscal year, compared to 69% in Fiscal 2011.”

Outlook

For the fourth quarter, the company expects revenues of about $316 million, non-GAAP earnings per share of approximately $.50, and GAAP earnings per share of $.46. For the full fiscal year, ending January 31, 2012, the company expects revenues of $1.01 billion, non-GAAP earnings per share of $1.05, and GAAP earnings per share of $.69.

DownStream Technologies has released DFMStream, a comprehensive yet easy-to-use tool suite designed to help engineers and designers verify design and manufacturing rules on PCB design databases, Gerber and NC data any time during the PCB design cycle.

Preparing PCB design data to be released to manufacturing is a critical and often fragile step in the new product introduction (NPI) process. Designs that work in a virtual PCB CAD system may unknowingly break critical manufacturing rules resulting in delayed delivery times as deviations and work-arounds are performed at the manufacturer. In the case of a manufacturer who “fixes” a design, the resolution could actually change the original design intent and then, if the “fix” is not fed back into the source EDA CAD data, will result in repeated violations when the board is to be built again.

Current DFM tools address some of the needs of engineering organizations but in most cases are expensive, difficult to learn and cumbersome to use by the infrequent user as part of the everyday design flow. With the release of DFMStream, DownStream Technologies bridges the gap between engineering and fabrication and addresses a critical need with a sophisticated and intuitive solution to cut costs and reduce product release bottlenecks.

“With DFMStream, we not only address the need for easy-to-use DFM tools but also introduce necessary functionality to help in the process of releasing PCB designs to manufacturing,” said Rick Almeida, one of the founders of DownStream. “The combination of deep DFM verification combined with an intuitive user interface makes it easy for even an infrequent user to have access to powerful DFM capabilities and is in stark contrast to competitive products that, because of their complex user interface, often require dedicated staff to operate.”

Included in DFMStream is the DesignAnalyzer–which analyzes the contents and complexity of a PCB design against the capabilities of the PCB fabricator. This functionality will help reduce the overall cost of PCB fabrication by helping the user choose the correct manufacturer and reducing hidden costs and unexpected delays. The Design Analyzer also generates a report containing all information required by a board vendor to estimate the cost and delivery of the fabricated PCB. In many cases the Design Analyzer can allow the fabricator to suggest minor changes to design features that could reduce fabrication cost without impeding design performance.

“The Design Analyzer tool is vital in PCB post-processing as it helps the board designer compare the design against the capabilities of the PCB fabricator, minimizing any risk and allowing for the most economical fabrication process,” said Almeida. “By analyzing the design users can optimize it for the best possible fabrication run while still in engineering and save time by helping to identify the appropriate fabricator for the job while maintaining quality and design integrity.”

DFMStream provides a number of tools to help verify design data for bare board fabrication, assembly, silkscreen, and solder and paste mask compliance for optimal manufacturability. In addition, manufacturing rule files can also be set up and re-used for specific vendor capabilities, greatly reducing set up time for DFM verification. DFMStream also supports a number of functions to allow users to sort through DFM errors to quickly isolate the root of the problem for fast defect resolution. Errors can be fixed right in DFMStream or cross probed back to the source E-CAD system to fix the error in the PCB database, eliminating repeat defects in follow on iterations and production runs.

Other DFMStream highlights include:

• “Streams” Driven Analysis–DFMStream uses a “Stream” file to queue a series of DFM analysis checks for a design. Users can define the order or “Stream” of checks combining netlist or layer comparison, design rule verification, fabrication and assembly verification on the entire design with a single click of a button. This dramatically reduces set up and execution of the analysis. DFMStream offers the ability to save and recall different Streams based on technology, vendor capabilities, or unique design requirements.
• Hierarchical Analysis–In many cases different parts of a PCB require different rules and different analysis. DFMStream’s unique rule hierarchy allows you to tailor the verification and rule sets according to bare board construction, board density, and component technology. DFMStream will locate errors that violate a set parameter such as incorrect spacing and potential errors such as silk screen ink over plated through holes that will arise during fabrication or assembly.
• Design Rule Compliance–Gerber, drill, and ODB++ data can be analyzed to ensure the data was correctly generated from the CAD design. Design rule verification compares the PCB features against PCB vendor design requirements to ascertain how well a board meets the manufacturer’s requirements even before submitting the PCB for fabrication.
• Bare Board Analysis for Fabrication–DFMStream’s analysis will detect specific topology issues that have an adverse effect on PCB fabrication such as outer vs. inner layers and plane layers, plating versus non plating drill hole checking and copper to board edge clearances.
• Mask and Screen Analysis for Assembly–DFMStream’s analysis will detect PCB topologies that could have an adverse effect on PCB assembly such as potential solder mask bridging where solder mask openings expose adjacent PCB features. DFMStream’s analysis will analyze silkscreen ink for potential pad contamination eliminating PCB scrap or rework and delays in product shipment and will detect missing, extra, and improperly sized paste masks reducing the incidence of cold solder joints or component tombstoning
• Design Delta Analysis–Use DFMStream’s Design Delta analysis to compare PCB design data from independent sources to identify differences. For example, compare a Netlist extracted from Gerber and NC data against a standard IPC-D-356 netlist generated from the PCB CAD design to ensure Gerber, NC, and ODB++ data were extracted correctly and without loss of design intent. DFMStream’s Design Delta analysis will perform comparisons such as: layer to layer; Gerber to design graphics; Gerber to drill; design revision to design revision and many other combinations.
• PCB Assembly Analysis–DFMStream’s analysis will detect improper part spacing, allowing the user to set up numerous spacing requirements between different part types that reflect the assembly line insertion flow.
• Error Charting–Large scale analysis can often result in a large number of reported failures. Viewing the results of large scale analysis in chart form allows you to get to the root of the failure and quickly ascertain a remedy.  Charting allows you to review the specifics of the failures to identify trends or unexpected results. DFMStream’s charting feature reports the exact value of the error and the PCB features involved in that error. The charting function groups common errors so they can be quickly identified and resolved in DFMStream or the host CAD system.
• Design Analyzer–DFMStream’s Design Analyzer bridges the gap between engineer and PCB fabricator by extracting key information about the PCB and presenting it in an easy to read report. This report is compared against the vendor’s fabrication capabilities to ensure the vendor can fabricate the PCB. The vendor can review the contents of the report and in many cases make suggested changes to the design that may result in significant savings of cost and valuable time to market.
• PCB CAD Cross Probing–DFMStream’s cross probing allows engineers to quickly visualize DFM analysis results with the source PCB CAD file. DFMStream supports hot-linking between both intelligent design data, such as ODB++, or Gerber information. Errors selected within DFMStream or the report window are immediately identified in the host CAD system. This allows you to correct the error in the source CAD design so later design iterations do not replicate known and resolved problems. DFMStream cross probes to the leading EDA CAD tools such as PADS, Expedition, OrCAD and Allegro.
• Gerber and NC Editing and Optimization–DFMStream’s editing environment allows you to make changes in Gerber or NC data when time constraints are critical. DFMStream offers a wide array of tools to add or modify Gerber flashes and draws, create custom apertures, modify apertures or drill parameters and so on. DFMStream provides flexibility to meet the design to manufacturing flow that correlates to the design situation.
• Fast Assembly Panel Creation–While focused primary on analysis, DFMStream also offers multi-image PCB panel design to quickly step and repeat an array of PCBs to drive pick and place assembly.

Zuken has announced its support for the IPC-2581 electronic data transfer format. IPC-2581 is a generic standard for printed circuit board manufacturing description data and transfer methodology. Zuken is a founding member of a new cross-industry consortium that has been established to support the standard. The first EDA vendor consortium member to support IPC-2581, Zuken has introduced the format into its CR-5000 product line in response to requests from customers and with the view that an independent format is best suited to meet customer requirements.

“We’re happy to see Zuken support the IPC-2581 format and we’re pleased to see the formation of a consortium of vendors and OEMs to promote and encourage adoption of the format,” says Mike Green of Lockheed Martin. “We have long believed that independently controlled and maintained standards are the most effective solution for industry-wide needs such as this.”

Independent Consortium

The need for an independent format that covers the wide range of needs has been recognized for many years. This led to the recent formation of a consortium for supply chain adoption of IPC-2581. The consortium’s goal is “to accelerate the adoption of IPC-2581 as an open, neutrally maintained global standard to encourage innovation, improve efficiency and reduce costs.”

Zuken’s Commitment

Zuken supports efforts by independent standards bodies such as IPC to create and maintain neutral standards that all may adopt and benefit from. “Open standards, such as IPC-2581, have always afforded the greatest benefit to the widest audience,” says Steve Chidester, Zuken’s Head of Product Marketing. “To support the requirements of our customers and the industry, Zuken will be an active member of the consortium and is committed to supporting this standard as a viable solution for our customers and the industry.”

To find out more about Zuken’s software solutions, contact your Zuken representative or visit www.zuken.com/.

About IPC-2581 Consortium

IPC-2581 Consortium is a group of PCB design and supply chain companies whose collective goal is to enable, facilitate and drive the use of IPC-2581 in the industry. It is devoted to accelerating the adoption of IPC-2581 as an open, neutrally maintained global standard to encourage innovation, improve efficiency and reduce costs. Members of the IPC-2581 Consortium include OEMs, EDA/DFM/CAM software companies, PCB fabricators, electronics assemblers and test companies. The Consortium is open to any PCB design and supply chain company that is prepared to support or is committed to a roadmap for IPC-2581 adoption.

Altium Designer has now been made available to over 5,000 GoEngineer customers.

GoEngineer, Inc., is a unique business partner and has been helping engineering, manufacturing, and product design companies innovate and stay competitive for the past 26 years. GoEngineer provides best-in-class solutions from SolidWorks, Stratasys, CAMWorks, and Oracle Agile PLM with training, services, and technical support resources throughout the Western and South Central United States.

Altium has engaged in a partnership with GoEngineer, a leading reseller of product design software, to deliver Altium’s next-generation electronics design software and services to GoEngineer’s network of over 5,000 U.S. customers. Altium’s electronic design automation (EDA) products complement GoEngineer’s existing line of design tools from SolidWorks, CAMWorks, Stratasys and others, and allows Altium to broaden its reach in the U.S. market.

“GoEngineer is pleased to add Altium to its core solution suite that focuses on solving tough technology problems and to help companies design better products,” said Ken Coburn, president and founder of GoEngineer. “We are impressed by Altium’s strategy in pioneering a next-generation electronics design platform that encompasses the full suite of tools needed to take a product from design to manufacture.”

GoEngineer will make available the full suite of Altium products, including Altium Designer software with smart design data management, FPGA/PCB co-design, real-time 3D PCB design, integrated version control, managed release processes, and more. Altium Designer is linked to AltiumLive, a new web-based ecosystem that acts as a conduit for delivering content and services directly to customers on the Altium subscription plan, and provides a platform that designers using Altium’s products can harness to more rapidly create cloud-connected electronic devices. Also available will be Satellite Vault technology for secure lifecycle management of electronic design data, provided as part of an Altium subscription.

“GoEngineer has demonstrated repeated success with their approach in providing customers with holistic service, from implementation to training to support for the design and manufacture of products,” said Bob Potock, director of marketing for Altium Americas. “As Altium continues to grow its global footprint, with over 2,800 new companies signing on in the past fiscal year, we’re pleased to partner with a market-leading organization like GoEngineer with over 26 years’ industry experience. The combination of the two organizations will provide a unique product and services offering for the product development community.”

911EDA, Inc. is a premier Altium Designer service provider offering both Altium Designer PCB layout services, FPGA design, and Altium Designer Training Courses.

Mark Laing is a product marketing manager in the Valor Division of Mentor Graphics Corporation.  Mark recently published the following column discussing design for manufacturability.  911EDA considers DFM in every design and can provide DFM analysis reports on how to reduce manufacturing costs, increase yield, and avoid potentially costly delays in the manufacturing process.

Mark’s column:

Complete fabrication analysis needs to be performed in conjunction with the PCB layout tool as part of a “left-shift” strategy (moving analysis further “left” on the timeline) that positions the analysis in conjunction with the layout process. That way, issues can be highlighted as soon as they are found, when they are easiest to correct as opposed to when the board is complete and the chance for change is limited and cost is excessive.

Design For Assembly

For most PCB assemblers, the biggest single defect category is solder-related. Ensuring the optimum relationship between the component pin, copper, mask and paste lessens the chances of these defects. OEMs now utilize available EDA tools that automatically check design rules and tolerances to ensure that a design can be effectively manufactured. Coupled with the DFM software should be a parts library which contains a robust selection of manufacturer-specific package parameters with detailed body outline contours and pin terminus areas that can be used to check the relationship between component and PCB. This is another key component of the DFM analysis, as it will highlight components that will not fit the board layout when an approved vendor list (AVL) is used.

For contract electronic manufacturers (CEM) who purchase components separately, performing this pin-to-board analysis can be crucial to optimizing manufacturing yields. Here, process preparation capabilities can automate pin-to-board analysis as part of the process to create complete manufacturing data for assembly, test, inspection and documentation purposes.

These same AVL packages can be used to determine if any proximity issues will arise from two components being too close to each other. With today’s lead-free solder, components typically stay where they were originally placed and so have fewer tendencies to self-center than with lead-based solder. The CAD outlines are a poor means of determining potential conflicts, and so this separate package analysis is crucial to reduce placement and rework issues.

Design For Test

The PCB manufacturing process is not perfect. If it were, there would be no need to test or inspect a board for headaches that arise from the assembly process or the components used to build the product. But due to continuing process improvements, some products require little, if any, test or inspection. Cell phones are now produced in such quantities and with such minimal changes to the production line that all testing can be covered using the built-in self-test (BIST) that has been incorporated into the product as part of its design.

However, most products do require a level of electrical test or non-contact inspection as a means of detecting component or process defects that have occurred. In the case of electrical test, features are placed on the board to provide a means of creating contact points between it and the piece of test equipment. This may be an in-circuit test (ICT) machine, a boundary scan test (BST) machine or a flying probe test (FPT) machine – or a human with a benchtop oscilloscope. It is advantageous to use dedicated features on the board for this purpose instead of existing pins on the board; the act of touching the board with a probe can cause a defect to occur or mask a defect from detection.

It is important to incorporate DFT analysis as early as possible in to the design process. The test engineering department can specify which nets on the board need test access. DFT software can then analyze the board and confirm whether the required access is available.

Summary

DFM analysis plays a major part in yield optimization of a PCB through the assembly processes, and to be effective it should be applied as early as possible in the design process as possible.

If you still believe DFM analysis isn’t essential, consider this: The Aberdeen Group found that integrating the described DFM process between design and assembly can reduce the number of design spins by 57% and achieve average material cost savings of $20,800 per design¹.

References

¹ Michelle Boucher, Why Printed Circuit Board Design Matters to the Executive: How PCBs are a Strategic Asset for Cost Reduction and Faster Time-to-Market, Aberdeen Group, Boston, MA, February 2010.

Mark Laing is a product marketing manager in the Valor Division of Mentor Graphics Corporation.